Fox (LP3500) User's Manual

Appendix E. Power Management

Appendix E describes the power circuitry provided on the LP3500. The LP3500 can operate from an unregulated external power source, or from an external battery. There is onboard battery backup for the SRAM and the real-time clock.

E.1 External Power Supply

Power is normally supplied to the LP3500 via pins 16 and 17 of header J2 on the LP3500. The Prototyping Board provides a convenient header plug for use with the AC adapter included with the LP3500 Tool Kit. The Prototyping Board includes a Shottky diode for protection against reverse polarity.

The raw DC power, VIN, goes through a linear regulator as shown in Figure E-1. The linear regulator outputs a Vcc of 2.8 V DC.

Figure E-1. LP3500 Linear Regulator Circuit

The power necessarily dissipated by the regulator can be calculated if both the external input voltage and the current drawn by the LP3500 are known. The current provided by the high-power output drivers does not have to be included if a separate power supply is connected to K so that power does not come from Vcc.

The linear regulator maintains its output voltage to within ±5% as long as the linear regulator is dissipating less than 0.75 W. Thermal shutdown turns the regulator off when it overheats. Figure E-1 shows the power operating curves for the specified VIN range of 3-30 V DC. Note that while a VIN range of 3-30 V is possible, 3-15 V is recommended to allow reasonable current.

Figure E-2. Linear Regulator Power Operating Curve

The LP3500 can operate at various different power levels, depending on which sections of the board are turned off using the devPowerSet function. Table E-1 lists the sections.

Table E-1. LP3500 Sections That Can Be Turned Off

LP3500 Section	Power Consumption	Controlled by Rabbit 3000 Port
RS-232	8 mA with load	PG1
RS-485	0.1 mA with no load	PG0
A/D Converter (LP3500 model only)	0.45 mA at 1.5 ksample/s sampling rate	PB6
Relay (LP3500 model only)	120 mA for 10 ms per switch	PG4, PG5
LCD/Keypad Module	5 mA without backlight, 50 mA for backlight, 5 mA for each LED (max. 7 LEDs)	PB0

NOTE	RxE always remains active to allow the LP3500 to "listen" while it is in the power-save mode.

Parallel Port PF7 on the Rabbit 3000 chip controls whether the linear regulator is on or off. Parallel Port PB0 senses whether there is an output from the linear regulator, and shuts off the RS-232 (except RxE, which is used to "listen"), RS-485, A/D converter, and relay sections via Parallel Ports PB6, PG0, PG1, PG4, and PG5 to conserve power.

E.2 Batteries and External Battery Connections

The SRAM and the real-time clock have battery backup. Power to the SRAM and the real-time clock (VRAM) is provided by two different sources, depending on whether the main part of the LP3500 is powered or not. When the LP3500 is powered normally, and Vcc is within operating limits, the SRAM and the real-time clock are powered from Vcc. If power to the board is lost or falls below 2.75 V, the VRAM and real-time clock power will come from either the onboard or the external battery. The reset generator circuit controls the source of power by way of its /RESET output signal.

A replaceable onboard 265 mA·h lithium battery provides power to the real-time clock and SRAM when all external power is removed from the circuit board and the LP3500 processor is off. The drain on the battery is typically 46 µA under these worst-case conditions, and so the expected life of the onboard battery is

The drain on the battery is typically less than 4 µA when external power is applied, and so the expected LP3500 battery in-service life is

The primary role of the onboard battery is to keep the SRAM and the real-time clock functional when the LP3500 processor is off. Even though there is limited capacity in the onboard battery, and its circuit is in parallel with that of the external battery, Rabbit strongly recommends against relying on the onboard battery for any role besides that of keeping the SRAM and the real-time clock functional when the LP3500 processor is off. The short in-service life of the onboard battery highlights the importance of an external battery, especially if the LP3500 is to operate in the power-save mode. A 2.8-3.3 V external battery or equivalent "regulated" voltage is recommended.

There is provision for an external battery connection via pins 14 and 15 on header J2 on the LP3500, and the LP3500 Prototyping Board has a plug-in header at J6 that can be used to connect an external battery to the LP3500/Prototyping Board combination.

Cycle the main power off/on on the LP3500 after you install a backup battery for the first time, and whenever you replace the battery. This step will minimize the current drawn by the real-time clock oscillator circuit from the backup battery should the LP3500 experience a loss of main power.

E.2.1 Replacing the Backup Battery

The battery is user-replaceable, and is fitted in a battery holder. To replace the battery, lift up on the spring clip and slide out the old battery. Use only a Panasonic CR2330 or equivalent replacement battery, and insert it into the battery holder with the + side facing up.

NOTE	The SRAM contents and the real-time clock settings will be lost if the battery is replaced with no power applied to the LP3500. Exercise care if you replace the battery while external power is applied to the LP3500.
NOTE	Should it be more convenient, it is also possible to install the onboard battery on the other side of the LP3500 board.

---

CAUTION:

There is an explosion danger if the battery is short-circuited, recharged, or replaced incorrectly. Replace the battery only with the same type or an equivalent type recommended by the battery manufacturer. Dispose of used batteries according to the battery manufacturer's instructions.

---

E.2.2 Power to VRAM Switch

The VRAM switch on the LP3500 module, shown in Figure E-3, allows the battery backup to provide power when the external power goes off. The switch provides an isolation between Vcc and the battery when Vcc goes low. This prevents the Vcc line from draining the battery.

Figure E-3. VRAM Switch

Field-effect transistor Q12 provides a very small voltage drop between Vcc and VRAM (<100 mV, typically 10 mV) so that the board components powered by Vcc will not have a significantly different voltage than VRAM.

When the LP3500 is not in reset, the /RESOUT line will be high. This allows VRAM to nearly equal Vcc.

When the LP3500 is in reset, the /RESOUT line will go low. This provides an isolation between Vcc and VRAM.

E.2.3 Reset Generator

The LP3500 module uses a reset generator on the module, U11, to reset the Rabbit 3000 microprocessor when the voltage drops below the voltage necessary for reliable operation. The reset occurs between 2.55 V and 2.75 V, typically 2.63 V.

E.3 Chip Select Circuit

The current drain on the battery in a battery-backed circuit must be kept at a minimum. When the LP3500 is not powered, the battery keeps the SRAM memory contents and the real-time clock (RTC) going. The SRAM has a powerdown mode that greatly reduces power consumption. This powerdown mode is activated by raising the chip select (CS) signal line. Normally the SRAM requires Vcc to operate. However, only 2 V is required for data retention in powerdown mode. Thus, when power is removed from the circuit, the battery voltage needs to be provided to both the SRAM power pin and to the CS signal line. The CS control circuit accomplishes this task for the SRAM's chip select signal line.

In a powered-up condition, the CS control circuit must allow the processor's chip select signal /CS1 to control the SRAM's CS signal /CSRAM. So, with power applied, /CSRAM must be the same signal as /CS1, and with power removed, /CSRAM must be held high (but only needs to be battery voltage high).The isolated /CSRAM line has a 220 kW pullup resistor to VRAM (R46). This pullup resistor keeps /CSRAM at the VRAM voltage level (which under no power condition is the backup battery's regulated voltage at a little more than 2 V).