Table 6-2. Rabbit Internal I/O Registers
| Register Name |
Mnemonic |
I/O Address |
R/W |
Reset |
Global Control/Status Register
|
|
|
|
|
Global Clock Modulator 0 Register
|
|
|
|
|
Global Clock Modulator 1 Register
|
|
|
|
|
Global Power Save Control Register
|
|
|
|
|
Global Output Control Register
|
|
|
|
|
Global Clock Double Register
|
|
|
|
|
MMU Instruction/Data Register
|
|
|
|
|
MMU Common Base Register
|
|
|
|
|
MMU Bank Base Register
|
|
|
|
|
MMU Common Bank Area Register
|
|
|
|
|
Memory Bank 0 Control Register
|
|
|
|
|
Memory Bank 1 Control Register
|
|
|
|
|
Memory Bank 2 Control Register
|
|
|
|
|
Memory Bank 3 Control Register
|
|
|
|
|
MMU Expanded Code Register
|
|
|
|
|
Memory Timing Control Register
|
|
|
|
|
Breakpoint/Debug Control Register
|
|
|
|
|
Slave Port Data 0 Register
|
|
|
|
|
Slave Port Data 1 Register
|
|
|
|
|
Slave Port Data 2 Register
|
|
|
|
|
Slave Port Status Register
|
|
|
|
|
Slave Port Control Register
|
|
|
|
|
Global ROM Configuration Register
|
|
|
|
|
Global RAM Configuration Register
|
|
|
|
|
Global CPU Configuration Register
|
|
|
|
|
Global Revision Register
|
|
|
|
|
Port A Data Register
|
|
|
|
|
Port B Data Register
|
|
|
|
|
Port B Data Direction Register
|
|
|
|
|
Port C Data Register
|
|
|
|
|
Port C Function Register
|
|
|
|
|
Port D Data Register
|
|
|
|
|
Port D Control Register
|
|
|
|
|
Port D Function Register
|
|
|
|
|
Port D Drive Control Register
|
|
|
|
|
Port D Data Direction Register
|
|
|
|
|
Port D Bit 0 Register
|
|
|
|
|
Port D Bit 1 Register
|
|
|
|
|
Port D Bit 2 Register
|
|
|
|
|
Port D Bit 3 Register
|
|
|
|
|
Port D Bit 4 Register
|
|
|
|
|
Port D Bit 5 Register
|
|
|
|
|
Port D Bit 6 Register
|
|
|
|
|
Port D Bit 7 Register
|
|
|
|
|
Port E Data Register
|
|
|
|
|
Port E Control Register
|
|
|
|
|
Port E Function Register
|
|
|
|
|
Port E Data Direction Register
|
|
|
|
|
Port E Bit 0 Register
|
|
|
|
|
Port E Bit 1 Register
|
|
|
|
|
Port E Bit 2 Register
|
|
|
|
|
Port E Bit 3 Register
|
|
|
|
|
Port E Bit 4 Register
|
|
|
|
|
Port E Bit 5 Register
|
|
|
|
|
Port E Bit 6 Register
|
|
|
|
|
Port E Bit 7 Register
|
|
|
|
|
Port F Data Register
|
|
|
|
|
Port F Control Register
|
|
|
|
|
Port F Function Register
|
|
|
|
|
Port F Drive Control Register
|
|
|
|
|
Port F Data Direction Register
|
|
|
|
|
Port G Data Register
|
|
|
|
|
Port G Control Register
|
|
|
|
|
Port G Function Register
|
|
|
|
|
Port G Drive Control Register
|
|
|
|
|
Port G Data Direction Register
|
|
|
|
|
Input Capture Ctrl/Status Register
|
|
|
|
|
Input Capture Control Register
|
|
|
|
|
Input Capture Trigger 1 Register
|
|
|
|
|
Input Capture Source 1 Register
|
|
|
|
|
Input Capture LSB 1 Register
|
|
|
|
|
Input Capture MSB 1 Register
|
|
|
|
|
Input Capture Trigger 2 Register
|
|
|
|
|
Input Capture Source 2 Register
|
|
|
|
|
Input Capture LSB 2 Register
|
|
|
|
|
Input Capture MSB 2 Register
|
|
|
|
|
I/O Bank 0 Control Register
|
|
|
|
|
I/O Bank 1 Control Register
|
|
|
|
|
I/O Bank 2 Control Register
|
|
|
|
|
I/O Bank 3 Control Register
|
|
|
|
|
I/O Bank 4 Control Register
|
|
|
|
|
I/O Bank 5 Control Register
|
|
|
|
|
I/O Bank 6 Control Register
|
|
|
|
|
I/O Bank 7 Control Register
|
|
|
|
|
PWM LSB 0 Register
|
|
|
|
|
PWM MSB 0 Register
|
|
|
|
|
PWM LSB 1 Register
|
|
|
|
|
PWM MSB 1 Register
|
|
|
|
|
PWM LSB 2 Register
|
|
|
|
|
PWM MSB 2 Register
|
|
|
|
|
PWM LSB 3 Register
|
|
|
|
|
PWM MSB 3 Register
|
|
|
|
|
Quad Decode Ctrl/Status Register
|
|
|
|
|
Quad Decode Control Register
|
|
|
|
|
Quad Decode Count 1 Register
|
|
|
|
|
Quad Decode Count 2 Register
|
|
|
|
|
Interrupt 0 Control Register
|
|
|
|
|
Interrupt 1 Control Register
|
|
|
|
|
Real Time Clock Control Register
|
|
|
|
|
Real Time Clock Byte 0 Register
|
|
|
|
|
Real Time Clock Byte 1 Register
|
|
|
|
|
Real Time Clock Byte 2 Register
|
|
|
|
|
Real Time Clock Byte 3 Register
|
|
|
|
|
Real Time Clock Byte 4 Register
|
|
|
|
|
Real Time Clock Byte 5 Register
|
|
|
|
|
Timer A Control/Status Register
|
|
|
|
|
Timer A Prescale Register
|
|
|
|
|
Timer A Time Constant 1 Register
|
|
|
|
|
Timer A Control Register
|
|
|
|
|
Timer A Time Constant 2 Register
|
|
|
|
|
Timer A Time Constant 8 Register
|
|
|
|
|
Timer A Time Constant 3 Register
|
|
|
|
|
Timer A Time Constant 9 Register
|
|
|
|
|
Timer A Time Constant 4 Register
|
|
|
|
|
Timer A Time Constant 10 Register
|
|
|
|
|
Timer A Time Constant 5 Register
|
|
|
|
|
Timer A Time Constant 6 Register
|
|
|
|
|
Timer A Time Constant 7 Register
|
|
|
|
|
Timer B Control/Status Register
|
|
|
|
|
Timer B Control Register
|
|
|
|
|
Timer B MSB 1 Register
|
|
|
|
|
Timer B LSB 1 Register
|
|
|
|
|
Timer B MSB 2 Register
|
|
|
|
|
Timer B LSB 2 Register
|
|
|
|
|
Timer B Count MSB Register
|
|
|
|
|
Timer B Count LSB Register
|
|
|
|
|
Serial Port A Data Register
|
|
|
|
|
Serial Port A Address Register
|
|
|
|
|
Serial Port A Long Stop Register
|
|
|
|
|
Serial Port A Status Register
|
|
|
|
|
Serial Port A Control Register
|
|
|
|
|
Serial Port A Extended Register
|
|
|
|
|
Serial Port B Data Register
|
|
|
|
|
Serial Port B Address Register
|
|
|
|
|
Serial Port B Long Stop Register
|
|
|
|
|
Serial Port B Status Register
|
|
|
|
|
Serial Port B Control Register
|
|
|
|
|
Serial Port B Extended Register
|
|
|
|
|
Serial Port C Data Register
|
|
|
|
|
Serial Port C Address Register
|
|
|
|
|
Serial Port C Long Stop Register
|
|
|
|
|
Serial Port C Status Register
|
|
|
|
|
Serial Port C Control Register
|
|
|
|
|
Serial Port C Extended Register
|
|
|
|
|
Serial Port D Data Register
|
|
|
|
|
Serial Port D Address Register
|
|
|
|
|
Serial Port D Long Stop Register
|
|
|
|
|
Serial Port D Status Register
|
|
|
|
|
Serial Port D Control Register
|
|
|
|
|
Serial Port D Extended Register
|
|
|
|
|
Serial Port E Data Register
|
|
|
|
|
Serial Port E Address Register
|
|
|
|
|
Serial Port E Long Stop Register
|
|
|
|
|
Serial Port E Status Register
|
|
|
|
|
Serial Port E Control Register
|
|
|
|
|
Serial Port E Extended Register
|
|
|
|
|
Serial Port F Data Register
|
|