Rabbit RIO User's Manual

5. Pulse-Width Modulator

5.1 Overview

The Rabbit RIO can be used to generate pulse-width modulator (PWM) signals. Each I/O block can generate up to four synchronized PWM signals that rise on the same counter rollover but have different duty cycles. Chapter 6 describes the generation of variable-phase PWM signals.

The block counter is put into the timer mode and is used to generate the period of the PWM waveform by setting both the clock input (either the master clock or the prescaler output) and the Count Limit Register. The PWM outputs are created via the status bits, which are set during the counter rollover and are reset by the Match Registers.

5.1.1 Block Diagram

5.2 Dependencies

Item	Description	Register
Counter	Yes	MPR, MR
Count Limit	Yes -- defines PWM period	CLLR, CLMR
Match Register	One per PWM signal (up to 4)	MnLR, MnMR
Status Bit	One per PWM signal (up to 4)	SnCR
Pin	One per PWM output (up to 4)	PnCR
Synch	Optional — used to reset counter	SCR
Interrupt	Optional — used for interrupt when match or rollover occurs	IER

5.3 Operation

When the counter is incremented by the main clock, the PWM period can be calculated as follows.

When the counter is incremented by the prescaled clock, the following equation should be used.

5.3.1 Setup

The following steps explain how to set up an I/O block for PWM operation.

1. Select the clock by writing to the Master Prescale Registers and to the Block Mode Register.

2. Set the Count Limit Registers to determine the PWM period.

3. Set the Match Registers to the desired duty cycles.

4. Set the status bit and pin for the desired outputs by writing to the Status n Control Register and to the Pin n Control Register.

5.3.2 Example

Figure 5-1 shows a sample PWM output with the registers written to as follows.

Register	Value	Description
MR	0x0C	Use prescaled clock, enable timer mode, continuous count
MPR	0x13	Divide 20 MHz clock by 20 (MPR = 19).
CLLR CLMR	0x270F	Count limit is 10,000 (CLR = 9,999).
M0LR M0MR	0x1388	Match at 5,000 to give 50-50 duty cycle.
S0CR	0x22	Status 0 set by Match 0, reset by counter rollover (increment).
P0CR	0x03	Pin bit outputs status.

Figure 5-1. Sample PWM Output

5.4 Other Comments

5.4.1 General-Purpose I/O

Any pins not in use for PWM can be used for general-purpose I/O.

5.4.2 External Synchronization

The PWM signals can be synchronized to an external signal via either the global synch or a local I/O block pin by writing to the Synch Control Register. This feature can be used to generate triac control signals by sending a zero-crossing signal to the Global Synch pin.

5.4.3 Interrupts

If desired, an interrupt can be generated from either the counter rollover or whenever any of the match registers match.

5.4.4 Higher Drive Current Operations

Multiple status bits could be set from a single match register, so the same signal could be output on multiple pins for applications that require a higher drive current.