Here at Rabbit tech support, we often get questions about the I/O capability of our various Rabbit processors. In this month’s article, I would like to summarize the capabilities and concentrate on some of the details of the Rabbit 5000. For more in-depth information I highly suggest reading the chapters on the parallel ports from the appropriate Rabbit (2/3/4/5)000 Microprocessor User’s Manual found at http://www.rabbit.com/docs/.
The nifty chart below is a summary of the parallel port I/O direction capabilities of each of the processors:
Parallel Port I/O Direction
| Parallel | Rabbit Processor | |||
| Ports | 2000 | 3000 | 4000 | 5000 |
| A | Byte In/Out | Byte In/Out | Byte In/Out | Byte In/Out |
| B | 6 In/2 Out | 8 Bit In/Out | 8 Bit In/Out | 8 Bit In/Out |
| C | 4 In/4 Out | 4 In/4 Out | 8 Bit In/Out | 8 Bit In/Out |
| D | 8 Bit In/Out | 8 Bit In/Out | 8 Bit In/Out | 8 Bit In/Out |
| E | 8 Bit In/Out | 8 Bit In/Out | 8 Bit In/Out | 8 Bit In/Out |
| F | na | 8 Bit In/Out | na | na |
| G | na | 8 Bit In/Out | na | na |
| H | na | na | na | 8 Bit In/Out |
- notes: Byte In/Out = all bits are either Input or Output
- 8 Bit In/Out = each bit is individually programmable for direction
- *Not all pins are available on all Core Modules – see the appropriate
- RCM User’s Manual for signal availability.
The remainder of this article references only the output features of the various registers.
For the Rabbit 2000 and 3000 processors the parallel port bits have at most one alternate output feature. This means that the bits are either digital output, programmed via the Port x Data Register (PxDR), or the output of one of the other subsystems of the processor, such as PWM. The selection is made via the Port x Function Register (PxFR) where each bit in the PxFR is associated with the same bit number in the PxDR. A ‘0’ in the PxFR bit makes the output bit a simple digital output. A ‘1’ in the PxFR bit causes the output to be associated with the alternate output.
The Rabbit 4000 and 5000 processors are more complex. Most of the output bits are designed to have up to four alternate output features. When the processors come out of Reset all the bits which can be inputs are set as inputs. Also, the alternate output features are essentially disabled. If a bit is set to be an output it will be a simple output with the state controlled via the appropriate PxDR.
Since there are up to four alternate output features there are two bits required to select among them. These bits are in the Port x Alternate Low Register (for the lower four outputs) and the Port x Alternate High Register (for the upper four outputs).
In order to select an alternate output feature the following steps must be followed (the order may or may not be important depending on the connected hardware):
- Using the table below select the desired alternate output feature
- Set the appropriate bit in the PxFR
- Set the appropriate bit in the PxDDR
This table shows the association between each bit in the PxDR and its associated bits in the appropriate Port x Address (Low/High) Register.
| Px3 | PxALR 7:6 | Px7 | PxAHR 7:6 | |
| Px2 | PxALR 5:4 | Px6 | PxAHR 5:4 | |
| Px1 | PxALR 3:2 | Px5 | PxAHR 3:2 | |
| Px0 | PxALR 1:0 | Px4 | PxAHR 1:0 |
Here is an example using parallel port E.
This table shows the alternate outputs available on port E:
| Bit | Alt Out 0 | Alt Out 1 | Alt Out 2 | Alt Out 3 |
| 7 | 17 | PWM 3 | SCLK C | |
| 6 | 16 | PWM 2 | TxE | |
| 5 | 15 | PWM 1 | RCLK E | |
| 4 | 14 | /A0 | PWM 0 | TCLK E |
| 3 | 13 | A23 | Timer C3 | SCLK D |
| 2 | 12 | A22 | Timer C2 | TxF |
| 1 | 11 | A21 | Timer C1 | RCLK F |
| 0 | 10 | A20 | Timer C0 | TCLK F |
The following code enables PWM1 on PE5:
- WrPortI ( PEAHR, &PEAHRShadow, PEAHRShadow &~0x0C ) ; clear bits 2 & 3 for PE5 control
- WrPortI ( PEAHR, &PEAHRShadow, PEAHRShadow | 0x 08 ) ; bit 3:2 = 10 = alternate output 2
- BitWrPortI ( PEFR, &PEFRShadow, 1, 5 ); ; enable alternate output on PE5
- BitWrPortI ( PEDDR, &PEDDRShadow, 1, 5 ); ; set PE5 as output
Now all you need to do is set up the parameters for PWM1 using the PWM registers.
- Larry C.
Larry Cicchinelli is Rabbit’s Technical Support Manager. He has 30 years of embedded experience, and is considered one of the foremost authorities on Rabbit products. Larry and his staff offer comprehensive technical support to Rabbit customers.
Submit your questions for Larry via email at AskLarry@rabbit.com
Read more Ask Larry Answers